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CHIP DESIGN FOR SUBMICRON VLSI : CMOS LAYOUT AND SIMULATION.

UYEMURA, JOHN P.

CHIP DESIGN FOR SUBMICRON VLSI : CMOS LAYOUT AND SIMULATION. - 2010 - NEW DELHI CENGAGE LEARNING PVT. LTD. - 411

Subjects--Topical Terms:
VLSI DESIGN

Dewey Class. No.: 621.395.395 / UYE

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