PROCESSOR DESIGN : SYSTEM-ON-CHIP COMPUTING FOR ASICs AND FPGAs. (Record no. 136632)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00444nam a2200181Ia 4500 |
| 041 ## - LANGUAGE CODE | |
| Language code of text/sound track or separate title | ENGLISH |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 005.14.14 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Item number | NUR |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | NURMI, JARI |
| 245 #0 - TITLE STATEMENT | |
| Title | PROCESSOR DESIGN : SYSTEM-ON-CHIP COMPUTING FOR ASICs AND FPGAs. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | NETHERLANDS |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Name of publisher | SPRINGER |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | 525 |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical Term | PROCESSOR DESIGN |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Reference |
| Full call number | Disc | Net Amount | Accession Number | Cost, replacement price | Price effective from | Koha item type | Department | Lost status | Damaged status | Not for loan | Withdrawn status | Permanent Location | Current Location | Date acquired | Source of acquisition | Cost, normal purchase price | Bill No | Bill Date | Language |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 005.14.14 | 22 | 8288 | PCCOEEC25300 | 10625.00 | 02/09/2022 | Reference | M. TECH. EMBEDDED SYSTEMS AND VLSI ( EANDTC ) | PCCOE | PCCOE | 01/10/2013 | BOOK LAND | 10625.00 | 8703 | 2013-09-18 | ENGLISH |