ADVANCED FPGA DESIGN ARCHITECTURE IMPLEMENTATION AND POTIMIZATION. (Record no. 138523)

MARC details
000 -LEADER
fixed length control field 00483nam a2200193Ia 4500
041 ## - LANGUAGE CODE
Language code of text/sound track or separate title   ENGLISH
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.395
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Item number KIL
100 ## - MAIN ENTRY--AUTHOR NAME
Personal name KILTS, STEVE
245 #0 - TITLE STATEMENT
Title ADVANCED FPGA DESIGN ARCHITECTURE IMPLEMENTATION AND POTIMIZATION.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication NEW YORK
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Name of publisher JOHN WILEY AND SONS INC.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Year of publication 2018
300 ## - PHYSICAL DESCRIPTION
Number of Pages 336
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term   ADVANCED FPGA DESIGN
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Reference
Holdings
Full call number Disc Net Amount Accession Number Cost, replacement price Price effective from Koha item type Department Lost status Damaged status Not for loan Withdrawn status Permanent Location Current Location Date acquired Source of acquisition Cost, normal purchase price Bill No Bill Date Language
621.395 25 2246.25 PCCOEEC34964 2995.00 02/09/2022 Reference E AND TC         PCCOE PCCOE 03/10/2018 SUYOG ENTERPRISES 2995.00 S/SI/18-19/5180 2018-10-03 ENGLISH