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CHIP DESIGN FOR SUBMICRON VLSI : CMOS LAYOUT AND SIMULATION.

By: UYEMURA, JOHN PMaterial type: TextTextLanguage:   ENGLISH Publication details: NEW DELHI ; CENGAGE LEARNING PVT. LTD. Edition: 2010Description: 411Subject(s):   VLSI DESIGNDDC classification: 621.395.395 |
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Holdings
Item type Current library Home library Call number Status Notes Date due Barcode
Reference Reference PCCOE
PCCOE
621.395.395 (Browse shelf(Opens below)) Available E AND TC PCCOEEC17366

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