UYEMURA, JOHN P. <br/><br/>
CHIP DESIGN FOR SUBMICRON VLSI : CMOS LAYOUT AND SIMULATION. 

 -  2010 
 - NEW DELHI  CENGAGE LEARNING PVT. LTD. 
 - 411 
<br/><br/><label>Subjects--Topical Terms: </label><br/>  VLSI DESIGN
<br/><br/><label>Dewey Class. No.: </label>621.395.395  / UYE