CHIP DESIGN FOR SUBMICRON VLSI : CMOS LAYOUT AND SIMULATION.
Material type: TextLanguage: ENGLISH Publication details: NEW DELHI ; CENGAGE LEARNING PVT. LTD. Edition: 2010Description: 411Subject(s): VLSI DESIGNDDC classification: 621.395.395 |Item type | Current library | Home library | Call number | Status | Notes | Date due | Barcode |
---|---|---|---|---|---|---|---|
Book with CD | PCCOE | PCCOE | 4.65 (Browse shelf(Opens below)) | Available | CB E&TC | PCCOEECCB1347 | |
Book with CD | PCCOE | PCCOE | 4.65 (Browse shelf(Opens below)) | Available | CB E&TC | PCCOEECCB1348 | |
Book with CD | PCCOE | PCCOE | 4.65 (Browse shelf(Opens below)) | Available | CB E&TC | PCCOEECCB1349 | |
Book with CD | PCCOE | PCCOE | 4.65 (Browse shelf(Opens below)) | Available | CB E&TC | PCCOEECCB1350 | |
Book with CD | PCCOE | PCCOE | 4.65 (Browse shelf(Opens below)) | Available | CB E&TC | PCCOEECCB1351 | |
Text Books | PCCOE | PCCOE | 621.395.395 (Browse shelf(Opens below)) | Available | E AND TC | PCCOEEC17362 |
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